1. Field of the Invention
The present invention relates to integrated circuit (IC) semiconductor device test apparatus, and more particularly to an interface between an automated test equipment (ATE) device and a socket loaded by an IC handler. The interface can be manually reconfigured to provide power, ground and signal connections to appropriate connectors on an IC for testing.
2. Description of the Background Art
An IC test apparatus typically includes a tester (ATE device), a socket, a precise robot (IC handler), and a handler-to-tester interface. A correctly functioning IC provides predictable predetermined output response signals responsive to specified input test signals. The ATE device provides a stream of such input test signals to the IC, receives the output response signals from the IC, and compares these output response signals with those expected from a correctly functioning IC. The socket physically holds the IC and connects power, ground, and the ATE device signals to the IC. The IC handler moves the IC to and from the socket. The handler-to-tester interface electrically connects the power, ground and ATE signals (both test signals and response signals) between the ATE device and the socket. The handler-to-tester interface typically is formed from a pair of printed circuit boards--the handler board and the tester board. The handler board attaches to the socket and provides electrical connections for the socket. The tester board mounts to the ATE device and often provides a way to transfer ATE device signals to the socket, mounted on the handler board, in a configurable manner. The handler-to-tester interface is the subject of the instant invention.
To test an IC, the test apparatus must properly provide power, ground and input test signals to the IC and receive output response signals from the IC. The ground and power are generally connected to the IC through conductive planes within the boards, although a dedicated metalized trace is sometimes used. Signals are connected from point to point by individual metalized traces. Each of these metalized traces is an electrical conductor. The tester board is removably but rigidly connected to the handler board such that the power, ground and ATE signals from the tester board are in electrical contact with the appropriate conductors on the handler board to drive the IC under test. Thus, the tester board carries signals between the ATE device and the handler board.
Custom ICs do not have a standard pin position for power and ground. Instead, designers of custom IC's place power and ground at pin locations that are most convenient for the designer. The manufacturer of the custom IC usually tests the IC for proper operation. Thus, the handler board is designed to conduct power, ground and signals to and from the tester board through the handler board to the custom IC held within the socket.
FIGS. 1a-1c illustrate the electrical connections between a prior art custom tester board and a handler board designed for a specific IC. The details relating to the mechanical connection (as compared to the electrical connections) of the handler board to the tester board are well known in the art and are not discussed further.
FIG. 1a illustrates a top view of a prior art handler board 101 designed for a specific IC. The handler board 101 has a plurality of vias 103, a plurality of connection pads 105, 107, 109, 111, a power connection pad 113 and a ground connection pad 115. The power pad 113 and the ground pad 115 are connected to separate power and ground conductive planes within the handler board. The handler board 101 also has a plurality of electrical conductors 117 that electrically connect the plurality of connection pads 105, 107, 109, 111, and the vias 103. The socket 119 physically holds the IC (not shown) and electrically connects the vias 103 to the contacts on the IC. The power and ground conductive planes are electrically connected to a power via 121 and a ground via 123 respectively. The power via 121 and the ground via 123 are connected to the power and ground of the IC by the socket 119. An electrical conductor 125 provides an electrical connection between the connection pad 105 and a via 127. The other pads and vias are similarly connected. The socket 119 is electrically connected to the handler board 101 by appropriately connecting socket contacts to the plurality of vias 103. Handler boards for testing very large scale integration ICs have many more vias, conductors, and pads than is illustrated by the handler board of FIG. 1a.
An IC that has a different power and ground contact configuration cannot be tested using this handler board 101 because the IC would not be properly connected to power and ground.
FIG. 1b illustrates a top view of a portion of a prior art custom tester board 131 having a number of compressible pins (such as pogo pins) 133, 135, 137, 139, extending upward from the tester board 131. When the tester board and the handler board 101 are physically connected, a power pin 141 on the tester board 131 connects to the power pad 113 on the handler board 101. The ground pin 143 on the tester board 131 is similarly electrically connected to the ground pad 115 of the handler board 101. The test signal pins 133, 135, 137, 139, are similarly connected to the connection pads 105, 107, 109, 111, respectively. Thus power, ground and test signals from the ATE device pass through the tester board 131 to the handler board 101, to the socket 119, and thus to the IC (not shown) mounted therein. Similarly, response signals from the IC are provided to the ATE device.
FIG. 1c illustrates a side view of the assembled tester board 131 and handler board 101 at the cutting planes 1c. For clarity, none of the prior art physical connection structure is included in FIG. 1c. However, the tester board 131 and the handler board 101 must be aligned and rigidly attached so that the plurality of compressible pins 133, 135, 137, 139, 141, 143 align and connect with the plurality of connection pads 105, 107, 109, 111, 113, 115. This alignment is illustrated by the test signal pin 133 contacting the connection pad 105 to make the appropriate electrical connection to provide a test signal to the socket 119.
Although this approach provides high quality signal paths that provide very high bandwidth connections between the ATE device and the socket 119, the tester board 131 must be custom manufactured for each type of handler board 101. Further, the handler board 101 is limited to ICs having power and ground at specific connectors. Thus, one or both boards must be designed and manufactured for each custom IC. Creating custom boards is expensive and time-consuming. Furthermore, each custom board must be stored when it is not in use. This storage can consume significant space depending on the number of customized IC designs supported. Thus, configurable tester boards have time, cost, storage and convenience advantages (among others) over custom boards.
Configurable tester boards include mechanisms to route ATE signals, power, and ground to the appropriate conductors of a variety of handler boards. This flexibility reduces the number of required tester and handler boards, as one configurable tester board can take the place of several custom tester boards resulting in considerable savings in time and money.
One prior art approach used to construct configurable tester boards is illustrated in FIGS. 2a-2c. FIG. 2a illustrates a top view of a handler board 201 similar to the handler board 101 of FIG. 1a. This handler board 201 also has a plurality of vias 203, a plurality of connection pads 205, 207, 209, 211, 213, 215, a plurality of electrical conductors 217, and a socket 219 used to physically hold the IC (not shown) and to electrically connect the vias 203 to the contacts on the IC. However, unlike the handler board 101 of FIG. 1a, none of the connection pads 205, 207, 209, 211, 213, 215 have a unique purpose. Power, ground or an ATE signal can be provided to each via as appropriate for the IC under test. The tester board is configured to provide power, ground and appropriate signals to the vias 203.
FIG. 2b illustrates a top view of a configurable tester board 231. In FIG. 2b, each of a plurality of compressible pins 233, 235, 237, 239, 241, 243 is respectively connected to one of a plurality of three-position switches 244, 245, 247, 249, 251, 253. Each of the plurality of switches 244, 245, 247, 249, 251, 253 selectively connects its associated compressible pin to power, ground or an ATE signal conductor. Thus, because power and ground connections can be configured, any handler board can be connected to the tester board as long as the plurality of connection pads 205, 207, 209, 211, 213, 215 (FIG. 2a) on the handler board 201 can be physically connected to the compressible pins 233, 235, 237, 239, 241, 243 (FIG. 2b) extending upward from the tester board 231. The problems with this type of customizable tester board 231 are discussed below.
FIG. 2c illustrates a side view of the assembled tester board 231 and handler board 201 at the cutting planes 2c. The tester board 231 and the handler board 201 must be aligned and rigidly attached so that the plurality of compressible pins 233, 235, 237, 239, 241, 243 align and connect with the plurality of connection pads 205, 207, 209, 211, 213, 215. This alignment is illustrated by the compressible pin 233 contacting the connection pad 205 to make the appropriate electrical connection to the socket 219. The plurality of switches, as illustrated by switch 253 used to configure compressible pin 243, must fit between the tester board 231 and the handler board 201.
One of the problems with this configurable tester board is that it is prone to error. For example, the switch settings can be accidentally changed. Further, the switches can be damaged or fail without any indication to the equipment operator. Also, the switches add resistance and capacitance to the conductor and thus degrade the signal carried by the conductor. This signal degradation reduces the maximum frequency of the ATE signals and therefore reduces the maximum bandwidth that can be supported by the tester board.
Yet another prior art approach replaces the switches 244, 245, 247, 249, 251, 253 shown in FIG. 2b with relays. This approach is more expensive than the switch configurable tester board but it eliminates the possibility of accidentally changing the position of a switch. However, this approach is also susceptible to errors. For example, an error occurs if the relay does not activate in response to a signal from the ATE device. As with switches, the relays add resistance and capacitance to the conductor, thus degrading the signal and reducing the maximum bandwidth of the tester board. Also, the ATE device may not be capable of accessing all of the large number of relays required to fully configure the tester board.
As mentioned above, the prior art is unreliable because of signal degradation and the unreliability of switches and relays. Further, the method used to mount these switches or relays requires that the board have many holes and vias in the conductors. These holes and vias increase the capacitance and resistance of the conductors. This increase in capacitance and resistance decreases the maximum operating speed of the tester board. To summarize, the prior art mechanisms used to configure customizable tester boards degrade the electrical characteristics of the tester board. This degradation makes prior art configurable tester boards unsuitable for testing very high speed ICs.
Thus, a need has arisen to configure a tester board and a handler board to test different IC devices using the same tester board while minimizing any signal degradation. The present invention addresses these problems and provides a manually configurable yet high bandwidth handler-to-tester interface for use with ATE devices.